bug: decoder offset on first packet, preamble miss on second — add sync byte #28

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opened 2026-08-01 22:44:09 +00:00 by time · 1 comment

time commented

2026-08-01 22:44:09 +00:00

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The rtl_433 flex decoder sees the first packet as 121 bits (offset by the 2ms t_wake ON prefix) and the second as 120 bits but missing the preamble (offset by the 1ms OFF inter-packet gap). The decoder's sync=4000 field is set but there's no sync byte in the actual packet structure. Fix: prepend a sync byte (0x00 → encoded 0xAAAA, all rising edges) before the preamble in each packet. This gives rtl_433 a 4000µs continuous pulse to use as a sync marker. Requires changes in three places: firmware (prepend sync byte before preamble), tx_emulator burst generation (prepend sync byte), and the rtl_433 cryogencc_pickle_01 decoder (skip the sync byte when parsing).

The rtl_433 flex decoder sees the first packet as 121 bits (offset by the 2ms t_wake ON prefix) and the second as 120 bits but missing the preamble (offset by the 1ms OFF inter-packet gap). The decoder's `sync=4000` field is set but there's no sync byte in the actual packet structure. Fix: prepend a sync byte (0x00 → encoded 0xAAAA, all rising edges) before the preamble in each packet. This gives rtl_433 a 4000µs continuous pulse to use as a sync marker. Requires changes in three places: firmware (prepend sync byte before preamble), tx_emulator burst generation (prepend sync byte), and the rtl_433 cryogencc_pickle_01 decoder (skip the sync byte when parsing).

time referenced this issue

2026-08-03 03:59:44 +00:00

feat: TX/RX working — first successful reception via rtl_433 #39

time commented

2026-08-03 04:00:15 +00:00

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Fixed in PR #39: tx/rx verified working with rtl_433 flex decoder. First packet offset and second packet preamble miss are resolved by the t_wake timing fixes and proper Manchester encoding.

time closed this issue

2026-08-03 04:06:57 +00:00